Circuit-level simulation of TID and thermal regeneration effects on 28nm FDSOI technology
Overview & Synopsis
In this work, we implement physical models that describe the effects of radiation and thermal regeneration on 28nm FDSOI transistors. These models can be implemented in circuit simulation software to simulate the radiation effects in this technology. We perform SPICE simulations using UTSOI 2.0 from the transistor to the circuit level to determine the electrical degradation and the recovery by applying annealing cycles. In addition, we test a thermal-electrical mitigation strategy to partially or fully recover the TID-induced electrical degradation in the transistors.
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hal.science)
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Document Information
| Document Title | Circuit-level simulation of TID and thermal regeneration effects on 28nm FDSOI technology |
|---|---|
| Author / Organization | Alejandro Ureña-Acuña, Jean-Marc Armani |
| Subject & Discipline | Multidisciplinary Academic Open Research |
| Categories | Science & Mathematics |
| Publication Year | 2024 |
| License / Rights | Open Access / Creative Commons |
| Resource Verification | Listed PDF (Verification Pending) |
| Original Host Website |
HAL Open Science
(hal.science)
|
| File Format | application/pdf (Portable Document Format) |
| Language | EN |
| Catalog ID | DOC-91960 |
| Original Source Link | Visit Source Page on hal.science » |