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Génération interfaciale des transistors NMOS implantes et naturels, à drain simple et doublement diffusé
J. Oualid, J. Dugas, R. Jérisian, A. Bouassis, D. Labrunye, J. M. Mirabel

Génération interfaciale des transistors NMOS implantes et naturels, à drain simple et doublement diffusé

Science & Mathematics Published 1991 Verification Pending

Overview & Synopsis

We have compared the true interfacial generation velocities (S0) and the diffusion lengths near the vicinity of the Si-SiO2 interface (Ls) on implanted and natural NMOS transistors with single diffused drain (SDD) or double diffused drain (DDD). An iterative procedure is proposed which allows the determination of both these electronic parameters by means of the measurement of the apparent interfacial velocities S'0 on two transistors with different gate lengths. S'0 values are deduced from the leakage current variation with gate polarization of the transistors used as gate controlled diodes (GCD). We show that the ionic implantation of boron for threshold voltage adjustment has a negligible influence on the true interfacial generation velocity, but it reduces Ls and consequently S'0 when the gate length is greater than Ls. We attribute the reduction of the true interfacial generation velocity observed on DDD transistors to the gettering effect due to phosphorus which is not homogeneous along the channel.

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Document Information

Document Title Génération interfaciale des transistors NMOS implantes et naturels, à drain simple et doublement diffusé
Author / Organization J. Oualid, J. Dugas, R. Jérisian, A. Bouassis, D. Labrunye, J. M. Mirabel
Subject & Discipline Multidisciplinary Academic Open Research
Categories Science & Mathematics
Publication Year 1991
License / Rights Open Access / Creative Commons
Resource Verification Listed PDF (Verification Pending)
Original Host Website HAL Open Science (hal.science)
File Format application/pdf (Portable Document Format)
Language EN
Catalog ID DOC-95371
Original Source Link Visit Source Page on hal.science »