Superlattices and heterostructures based on chalcogenide materials for improving the performance of non-volatile phase change memories

Overview & Synopsis

To meet the growing demand for ever-smaller, higher-performance memory devices, innovative memory technologies have been developed. Among these innovative memories, Phase Change Memory (PCM), based on the fast and reversible phase change between an amorphous and crystalline state occurring in some chalcogenide materials, is emerging as the key technology to obtain fast and non-volatile memories. However, PCM technology suffers from excessive power consumption during the RESET operation, where a small volume of phase-change material has to be melted and then quenched very quickly, limiting its miniaturization potential. Over the past decade, GeTe/Sb2Te3 superlattices (SLs) integrated into PCM devices have received particular attention due to their low power consumption compared with conventional PCM devices based on the polycrystalline Ge2Sb2Te5 alloy. The reduced power consumption required to switch from the SET to RESET states in SL-based PCM devices has been attributed to a resistive crystal-to-crystal transition, but the underlying switching mechanism is still debated in the literature. Therefore, this thesis aims to understand the underlying nature of the switching mechanism occurring between the SET and RESET states in SL-based PCM devices, as well as the origin of the low power consumption.To this end, various crystalline (GeTe)2/(Sb2Te3)X SLs thin films (X=2, 4, 8, 16, and 35) with a preferential orientation of the atomic planes parallel to the substrate surface (out-of-plane oriented) are deposited by industrial magnetron sputtering. Atomic-resolution STEM (Scanning-Transmission Electron Microscopy) imaging coupled with X-ray diffraction show that the as-deposited SL structures are composed of various Ge-Sb-Te (GST) blocks and Sb2Te3 QLs (Quintuple Layers) separated by pseudo van der Waals gaps. The stacking disorder in the as-deposited SL decreases as X increases. Upon thermal annealing at 450°C for one hour, the as-deposited (GeTe)2/(Sb2Te3)X SLs thin films transform into out-of-plane oriented (GeTe)n/(Sb2Te3)m alloys of the average atomic composition of the SL film.Afterwards, crystalline (GeTe)2/(Sb2Te3)X SLs with X=2, 4, and 8 are integrated into PCM devices. The first electrical tests show that the RESET power consumption of SL-based PCM devices decreases as X increases. STEM-imaging coupled with Nano Beam Electron Diffraction (NBED) of a (GeTe)2/(Sb2Te3)8 SL (X= 8) PCM device, previously programmed in the RESET state, reveals that the switching mechanism is based on a melting-quenching process as in conventional PCM devices. Then, annealing of as-fabricated (GeTe)2/(Sb2Te3)2 SL PCM devices (X= 2) is performed up to 450°C to reduce the stacking disorder of the SL crystalline state, and to reach the atomic structure of an out-of-plane oriented rhombohedral Ge1Sb2Te4 alloy inside the memory cells. The programming performances of the PCM devices based on the out-of-plane oriented rhombohedral Ge1Sb2Te4 alloy are similar to those of the as-fabricated (GeTe)2/(Sb2Te3)8 (X=8) SL PCM devices. Therefore, a GeTe/Sb2Te3 SL structure is not required to achieve low power consumption in PCM devices. Finally, some SL-based PCM devices are programmed with very high currents compared to the minimal RESET current required to reach the RESET state of the memory cells. As a result, the power consumption of the RESET operation strongly increases. However, the degradation is reversible by applying subsequent thermal annealing to the PCM devices. This reversible degradation of the PCM performances is attributed to a reversible disorder-order transition of the SL material integrated in the memory cells.