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An FPGA Software Defined Radio Platform with a High-Level Synthesis Design Flow
Vaibhav Bhatnagar, Ganda Stephane Ouedraogo, Matthieu Gautier, Arnaud Carer, Olivier Sentieys

An FPGA Software Defined Radio Platform with a High-Level Synthesis Design Flow

Science & Mathematics Published 2013 Verification Pending

Overview & Synopsis

Software defined radio (SDR) opens a new door to future Internet of Things with higher degree of designing flexibility in context of wireless system development. Prototyping a remote implementation of wireless protocols on a hardware over the web requires a highly versatile software radio platform along with laid-back designing tools. To this aim, an FPGA-based SDR scheme has been proposed combining Virtex-6 Perseus 6010 platform capabilities and a design flow based on High-Level Synthesis (HLS) tools. A full IEEE 802.15.4 (ZigBee) physical layer has been implemented on the proposed platform from a C-language dataflow specification. All the results have been analyzed to lead to a fair comparison between different design flows. Although the proposed SDR has some designing issues, it shows a noticeable designing potentiality to flexible prototyping of future wireless systems.

Indexed from repository: HAL Open Science (hal.science)
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Document Information

Document Title An FPGA Software Defined Radio Platform with a High-Level Synthesis Design Flow
Author / Organization Vaibhav Bhatnagar, Ganda Stephane Ouedraogo, Matthieu Gautier, Arnaud Carer, Olivier Sentieys
Subject & Discipline Multidisciplinary Academic Open Research
Categories Science & Mathematics
Publication Year 2013
License / Rights Open Access / Creative Commons
Resource Verification Listed PDF (Verification Pending)
Original Host Website HAL Open Science (hal.science)
File Format application/pdf (Portable Document Format)
Language EN
Catalog ID DOC-219713
Original Source Link Visit Source Page on hal.science »