DESIGN OF LOW POWER AND AREA EFFICIENT APPROXIMATE MULTIPLIER WITH REDUCED COMPLEXITY USING ENCODED PARTIAL PRODUCTS AND VEDIC MULTIPLICATION
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| Document Title | DESIGN OF LOW POWER AND AREA EFFICIENT APPROXIMATE MULTIPLIER WITH REDUCED COMPLEXITY USING ENCODED PARTIAL PRODUCTS AND VEDIC MULTIPLICATION |
|---|---|
| Author / Organization | D. SASIDHAR, N.A.V. PRASAD, R. VASIM AKRAM |
| Subject & Discipline | Scientific Research & Data |
| Categories | Science & Mathematics |
| Publication Year | 2024 |
| License / Rights | cc-by-4.0 |
| Resource Verification | Listed PDF (Verification Pending) |
| Original Host Website |
Zenodo
(zenodo.org)
|
| File Format | application/pdf (Portable Document Format) |
| Reported File Size | 299.3 KB (306,521 bytes) |
| Language | EN |
| Catalog ID | DOC-14786 |
| Original Source Link | Visit Source Page on zenodo.org » |