A Low Phase Noise and Wide-Bandwidth BiCMOS SiGe:C 0.25µm Digital Frequency Divider For An On-Chip Phase-Noise Measurement Circuit
Overview & Synopsis
A low phase noise and wide-bandwidth frequency divider has been developed in a 0.25 µm SiGe:C process. This paper discusses the BiCMOS design improvements used for ultra low phase noise applications like on-chip phase-noise measurement circuit. From a single-ended signal provided by a local oscillator LO, the wide-bandwidth frequency divider circuit generates accurate quadrature signals. For the full 1kHz-5.5 GHz input frequency range, the frequency divider achieves an output quadrature error less than ±1°. This paper presents a novel architecture designed for improving phase noise and exhibits a measured residual phase noise of -164 dBc/Hz @ 100 kHz with a 3.5 GHz input frequency.
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hal.science)
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Document Information
| Document Title | A Low Phase Noise and Wide-Bandwidth BiCMOS SiGe:C 0.25µm Digital Frequency Divider For An On-Chip Phase-Noise Measurement Circuit |
|---|---|
| Author / Organization | Sylvain Godet, Éric Tournier, Olivier Llopis, Andreia Cathelin, Julien Juyon |
| Subject & Discipline | Multidisciplinary Academic Open Research |
| Categories | Science & Mathematics |
| Publication Year | 2009 |
| License / Rights | Open Access / Creative Commons |
| Resource Verification | Listed PDF (Verification Pending) |
| Original Host Website |
HAL Open Science
(hal.science)
|
| File Format | application/pdf (Portable Document Format) |
| Language | EN |
| Catalog ID | DOC-120241 |
| Original Source Link | Visit Source Page on hal.science » |