Parallel Programming for FPGAs

Overview & Synopsis

Aimed at teaching hardware and software developers how to efficiently program FPGAs using high-level synthesis (HLS). Focuses on the use of algorithmic high-level synthesis (HLS) to build application-specific FPGA systems.

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Document Information

Document Title Parallel Programming for FPGAs
Author / Organization Ryan Kastner, Janarbek Matai, Stephen Neuendorffer
Subject & Discipline Field Programmable Gate Arrays (FPGA), Parallel Computing and Programming, Hardware Description Language (HDL), VHDL, Verilog, etc., Electronics Circuit Design and Programming, Embedded Systems Books
Categories Field Programmable Gate Arrays (FPGA)
License / Rights Creative Commons License (CC)
Resource Verification Verification pending
Alternative Mirrors & Links
Original Host Website FreeComputerBooks.com (freecomputerbooks.com)
File Format application/pdf (Portable Document Format)
Language ENGLISH
Catalog ID DOC-38388
Original Source Link Visit Source Page on freecomputerbooks.com »