Home »
Academic Articles »
C »
Simulation Study of the Double-Gate Tunnel Field-Effect Transistor with Step Channel Thickness
Simulation Study of the Double-Gate Tunnel Field-Effect Transistor with Step Channel Thickness
Maolin Zhang
(College of Electronic and Optical Engineering and College of Microelectronics, Nanjing University of Posts and Telecommunications and National and Local Joint Engineering Laboratory of RF Integration and Micro-assembly Technology)
Yufeng Guo
(College of Electronic and Optical Engineering and College of Microelectronics, Nanjing University of Posts and Telecommunications and National and Local Joint Engineering Laboratory of RF Integration and Micro-assembly Technology)
Jun Zhang
(College of Electronic and Optical Engineering and College of Microelectronics, Nanjing University of Posts and Telecommunications and National and Local Joint Engineering Laboratory of RF Integration and Micro-assembly Technology)
Jiafei Yao
(College of Electronic and Optical Engineering and College of Microelectronics, Nanjing University of Posts and Telecommunications and National and Local Joint Engineering Laboratory of RF Integration and Micro-assembly Technology)
Jing Chen
(College of Electronic and Optical Engineering and College of Microelectronics, Nanjing University of Posts and Telecommunications and National and Local Joint Engineering Laboratory of RF Integration and Micro-assembly Technology)
Journal: Nanoscale Research Letters
•
• SpringerOpen
• ISSN: 1556-276X
Abstract
Abstract Double-gate tunnel field-effect transistor (DG TFET) is expected to extend the limitations of leakage current and subthreshold slope. However, it also suffers from the ambipolar behavior with the symmetrical source/drain architecture. To overcome the ambipolar current, asymmetry must be introduced between the source and drain. In this paper, we investigate the performances of DG TFET with step channel thickness (SC TFET) by utilizing the 2D simulation. The asymmetry between source and drain is introduced through the step channel thickness; hence, the ambipolar behavior is expected to be relieved. The results show that the SC TFET exhibits significant reduction of ambipolar current compared with the conventional DG TFET. The mechanisms of SC TFET are thoroughly discussed to explore the physical insight. The impacts introduced by the structure parameters on onset voltage, subthreshold slope, drain current in on-state and ambipolar-state are also exhibited in determining the optimal structure.
Maolin Zhang, Yufeng Guo, Jun Zhang, et al. (2020). "Simulation Study of the Double-Gate Tunnel Field-Effect Transistor with Step Channel Thickness". Nanoscale Research Letters. https://doi.org/10.1186/s11671-020-03360-7